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<fr:tree
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xmlns:fr="http://www.jonmsterling.com/jms-005P.xml"><fr:frontmatter><fr:anchor>394</fr:anchor><fr:addr
type="user">ocs-000J</fr:addr><fr:route>ocs-000J.xml</fr:route><fr:title
text="Single Instruction Multiple Vector (SIMD) › Vector intrinsics"><fr:link
type="local"
href="ocs-0009.xml"
addr="ocs-0009"
title="Single Instruction Multiple Vector (SIMD)">Single Instruction Multiple Vector (SIMD)</fr:link> › Vector intrinsics</fr:title><fr:authors /></fr:frontmatter><fr:mainmatter><fr:p>Intrinsics appear like regular libary functions. You include the relevant header, and then you can use it just like any other lib. E.g. assuming a visual c++ compiler, if you wanted to add four float numbers to another four numbers, you would include the <fr:code>xmmintrin.h</fr:code> header which contains the following declaration for the <fr:code>_mm_add_ps</fr:code> intrinsic:</fr:p><fr:pre><![CDATA[extern _m128 _mm_add_ps( _m128 _A, _m128 _B);]]></fr:pre><fr:p>However unlike lib functions, intrinsics are implemented directly in compilers. The example SSE intrinsic typically compiles to a single instruction, x86 and amd64 instructions. For the time it takes CPU to call a library function, it might have completed dozen of these functions.</fr:p><fr:p>For all x86 the current best practice is to use <fr:code>&lt;immintrin.h&gt;</fr:code> which loads in the the correct compatible instruction set.
<fr:ul><fr:li>__MMX__ -- X86 MMX :: <fr:code>mmintrin.h</fr:code></fr:li>
<fr:li>__SSE__ -- X86 SSE :: <fr:code>xmmintrin.h</fr:code></fr:li>
<fr:li>__SSE2__ -- X86 SSE2 :: <fr:code>emmintrin.h</fr:code></fr:li>
<fr:li>__VEC__ -- altivec functions :: <fr:code>altivec.h</fr:code></fr:li>
<fr:li>__ARM_NEON__ -- ARM Neon functions :: <fr:code>arm_neon.h</fr:code></fr:li></fr:ul></fr:p>
  <html:table
xmlns:html="http://www.w3.org/1999/xhtml">
  
  
  <html:tr>
    
  <html:td><fr:strong>Operation</fr:strong></html:td>

    
  <html:td><fr:strong>Altivec</fr:strong></html:td>

    
  <html:td><fr:strong>Neon</fr:strong></html:td>

    
  <html:td><fr:strong>MMX/SSE/SSE2</fr:strong></html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td>
  <html:hr />
</html:td>

    
  <html:td>
  <html:hr />
</html:td>

    
  <html:td>
  <html:hr />
</html:td>

    
  <html:td>
  <html:hr />
</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td>loading</html:td>

    
  <html:td>vec_ld</html:td>

    
  <html:td>vld1q_f32</html:td>

    
  <html:td>_mm_set_epi16</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td>vector</html:td>

    
  <html:td>vec_splat</html:td>

    
  <html:td>vld1q_s16</html:td>

    
  <html:td>_mm_set1_epi16</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td>vec_splat_s16</html:td>

    
  <html:td>vsetq_lane_f32</html:td>

    
  <html:td>_mm_set1_pi16</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td>vec_splat_s32</html:td>

    
  <html:td>vld1_u8</html:td>

    
  <html:td>_mm_set_pi16</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td>vec_splat_s8</html:td>

    
  <html:td>vdupq_lane_s16</html:td>

    
  <html:td>_mm_load_ps</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td>vec_splat_u16</html:td>

    
  <html:td>vdupq_n_s16</html:td>

    
  <html:td>_mm_set1_ps</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td>vec_splat_u32</html:td>

    
  <html:td>vmovq_n_f32</html:td>

    
  <html:td>_mm_loadh_pi</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td>vec_splat_u8</html:td>

    
  <html:td>vset_lane_u8</html:td>

    
  <html:td>_mm_loadl_pi</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td>storing</html:td>

    
  <html:td>vec_st</html:td>

    
  <html:td>vst1_u8</html:td>

    
  <html:td />

  </html:tr>



  
  
  <html:tr>
    
  <html:td>vector</html:td>

    
  <html:td />

    
  <html:td>vst1q_s16</html:td>

    
  <html:td>_mm_store_ps</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td />

    
  <html:td>vst1q_f32</html:td>

    
  <html:td />

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td />

    
  <html:td>vst1_s16</html:td>

    
  <html:td />

  </html:tr>



  
  
  <html:tr>
    
  <html:td>add</html:td>

    
  <html:td>vec_madd</html:td>

    
  <html:td>vaddq_s16</html:td>

    
  <html:td>_mm_add_epi16</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td>vec_mladd</html:td>

    
  <html:td>vaddq_f32</html:td>

    
  <html:td>_mm_add_pi16</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td>vec_adds</html:td>

    
  <html:td>vmlaq_n_f32</html:td>

    
  <html:td>_mm_add_ps</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td>subtract</html:td>

    
  <html:td>vec_sub</html:td>

    
  <html:td>vsubq_s16</html:td>

    
  <html:td />

  </html:tr>



  
  
  <html:tr>
    
  <html:td>multiply</html:td>

    
  <html:td>vec_madd</html:td>

    
  <html:td>vmulq_n_s16</html:td>

    
  <html:td>_mm_mullo_epi16</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td>vec_mladd</html:td>

    
  <html:td>vmulq_s16</html:td>

    
  <html:td>_mm_mullo_pi16</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td />

    
  <html:td>vmulq_f32</html:td>

    
  <html:td>_mm_mul_ps</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td />

    
  <html:td>vmlaq_n_f32</html:td>

    
  <html:td />

  </html:tr>



  
  
  <html:tr>
    
  <html:td>arithmetic</html:td>

    
  <html:td>vec_sra</html:td>

    
  <html:td>vshrq_n_s16</html:td>

    
  <html:td>_mm_srai_epi16</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td>shift</html:td>

    
  <html:td>vec_srl</html:td>

    
  <html:td />

    
  <html:td>_mm_srai_pi16</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td>vec_sr</html:td>

    
  <html:td />

    
  <html:td />

  </html:tr>



  
  
  <html:tr>
    
  <html:td>byte</html:td>

    
  <html:td>vec_perm</html:td>

    
  <html:td>vtbl1_u8</html:td>

    
  <html:td>_mm_shuffle_pi16</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td>permutation</html:td>

    
  <html:td>vec_sel</html:td>

    
  <html:td>vtbx1_u8</html:td>

    
  <html:td>_mm_shuffle_ps</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td>vec_mergeh</html:td>

    
  <html:td>vget_high_s16</html:td>

    
  <html:td />

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td>vec_mergel</html:td>

    
  <html:td>vget_low_s16</html:td>

    
  <html:td />

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td />

    
  <html:td>vdupq_lane_s16</html:td>

    
  <html:td />

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td />

    
  <html:td>vdupq_n_s16</html:td>

    
  <html:td />

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td />

    
  <html:td>vmovq_n_f32</html:td>

    
  <html:td />

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td />

    
  <html:td>vbsl_u8</html:td>

    
  <html:td />

  </html:tr>



  
  
  <html:tr>
    
  <html:td>type</html:td>

    
  <html:td>vec_cts</html:td>

    
  <html:td>vmovl_u8</html:td>

    
  <html:td>_mm_packs_pu16</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td>conversion</html:td>

    
  <html:td>vec_unpackh</html:td>

    
  <html:td>vreinterpretq_s16_u16</html:td>

    
  <html:td />

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td>vec_unpackl</html:td>

    
  <html:td>vcvtq_u32_f32</html:td>

    
  <html:td />

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td>vec_cts</html:td>

    
  <html:td>vqmovn_s32</html:td>

    
  <html:td>_mm_cvtps_pi16</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td>vec_ctu</html:td>

    
  <html:td>vqmovun_s16</html:td>

    
  <html:td>_mm_packus_epi16</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td />

    
  <html:td>vqmovn_u16</html:td>

    
  <html:td />

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td />

    
  <html:td>vcvtq_f32_s32</html:td>

    
  <html:td />

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td />

    
  <html:td>vmovl_s16</html:td>

    
  <html:td />

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td />

    
  <html:td>vmovq_n_f32</html:td>

    
  <html:td />

  </html:tr>



  
  
  <html:tr>
    
  <html:td>vector</html:td>

    
  <html:td>vec_pack</html:td>

    
  <html:td>vcombine_u16</html:td>

    
  <html:td />

  </html:tr>



  
  
  <html:tr>
    
  <html:td>combination</html:td>

    
  <html:td>vec_packsu</html:td>

    
  <html:td>vcombine_u8</html:td>

    
  <html:td />

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td />

    
  <html:td>vcombine_s16</html:td>

    
  <html:td />

  </html:tr>



  
  
  <html:tr>
    
  <html:td>maximum</html:td>

    
  <html:td />

    
  <html:td />

    
  <html:td>_mm_max_ps</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td>minimum</html:td>

    
  <html:td />

    
  <html:td />

    
  <html:td>_mm_min_ps</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td>vector</html:td>

    
  <html:td />

    
  <html:td />

    
  <html:td>_mm_andnot_ps</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td>logic</html:td>

    
  <html:td />

    
  <html:td />

    
  <html:td>_mm_and_ps</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td />

    
  <html:td />

    
  <html:td>_mm_or_ps</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td>rounding</html:td>

    
  <html:td>vec_trunc</html:td>

    
  <html:td />

    
  <html:td />

  </html:tr>



  
  
  <html:tr>
    
  <html:td>misc</html:td>

    
  <html:td />

    
  <html:td />

    
  <html:td>_mm_empty</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td>
  <html:hr />
</html:td>

    
  <html:td>
  <html:hr />
</html:td>

    
  <html:td>
  <html:hr />
</html:td>

    
  <html:td>
  <html:hr />
</html:td>

  </html:tr>



</html:table>
</fr:mainmatter><fr:backmatter><fr:tree
toc="false"
numbered="false"
show-heading="true"
show-metadata="false"
expanded="true"
root="false"
xmlns:fr="http://www.jonmsterling.com/jms-005P.xml"><fr:frontmatter><fr:title
text="Context">Context</fr:title><fr:authors /></fr:frontmatter><fr:mainmatter><fr:tree
toc="true"
numbered="false"
show-heading="true"
show-metadata="true"
expanded="false"
root="false"
xmlns:fr="http://www.jonmsterling.com/jms-005P.xml"><fr:frontmatter><fr:anchor>395</fr:anchor><fr:addr
type="user">ocs-0009</fr:addr><fr:route>ocs-0009.xml</fr:route><fr:title
text="Single Instruction Multiple Vector (SIMD)">Single Instruction Multiple Vector (SIMD)</fr:title><fr:taxon>Note</fr:taxon><fr:date><fr:year>2025</fr:year><fr:month>3</fr:month><fr:day>20</fr:day></fr:date><fr:authors /></fr:frontmatter><fr:mainmatter><fr:p>Single vector instruction sets are extensions to the original architecture instruction sets, and thus you have to invest extra effort to use and support them. With compiled code, you need to write inline assembly, or use vector intrinsics.</fr:p><fr:tree
toc="true"
numbered="true"
show-heading="true"
show-metadata="false"
expanded="true"
root="false"
xmlns:fr="http://www.jonmsterling.com/jms-005P.xml"><fr:frontmatter><fr:anchor>255</fr:anchor><fr:addr
type="user">ocs-000J</fr:addr><fr:route>ocs-000J.xml</fr:route><fr:title
text="Vector intrinsics">Vector intrinsics</fr:title><fr:authors /></fr:frontmatter><fr:mainmatter><fr:p>Intrinsics appear like regular libary functions. You include the relevant header, and then you can use it just like any other lib. E.g. assuming a visual c++ compiler, if you wanted to add four float numbers to another four numbers, you would include the <fr:code>xmmintrin.h</fr:code> header which contains the following declaration for the <fr:code>_mm_add_ps</fr:code> intrinsic:</fr:p><fr:pre><![CDATA[extern _m128 _mm_add_ps( _m128 _A, _m128 _B);]]></fr:pre><fr:p>However unlike lib functions, intrinsics are implemented directly in compilers. The example SSE intrinsic typically compiles to a single instruction, x86 and amd64 instructions. For the time it takes CPU to call a library function, it might have completed dozen of these functions.</fr:p><fr:p>For all x86 the current best practice is to use <fr:code>&lt;immintrin.h&gt;</fr:code> which loads in the the correct compatible instruction set.
<fr:ul><fr:li>__MMX__ -- X86 MMX :: <fr:code>mmintrin.h</fr:code></fr:li>
<fr:li>__SSE__ -- X86 SSE :: <fr:code>xmmintrin.h</fr:code></fr:li>
<fr:li>__SSE2__ -- X86 SSE2 :: <fr:code>emmintrin.h</fr:code></fr:li>
<fr:li>__VEC__ -- altivec functions :: <fr:code>altivec.h</fr:code></fr:li>
<fr:li>__ARM_NEON__ -- ARM Neon functions :: <fr:code>arm_neon.h</fr:code></fr:li></fr:ul></fr:p>
  <html:table
xmlns:html="http://www.w3.org/1999/xhtml">
  
  
  <html:tr>
    
  <html:td><fr:strong>Operation</fr:strong></html:td>

    
  <html:td><fr:strong>Altivec</fr:strong></html:td>

    
  <html:td><fr:strong>Neon</fr:strong></html:td>

    
  <html:td><fr:strong>MMX/SSE/SSE2</fr:strong></html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td>
  <html:hr />
</html:td>

    
  <html:td>
  <html:hr />
</html:td>

    
  <html:td>
  <html:hr />
</html:td>

    
  <html:td>
  <html:hr />
</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td>loading</html:td>

    
  <html:td>vec_ld</html:td>

    
  <html:td>vld1q_f32</html:td>

    
  <html:td>_mm_set_epi16</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td>vector</html:td>

    
  <html:td>vec_splat</html:td>

    
  <html:td>vld1q_s16</html:td>

    
  <html:td>_mm_set1_epi16</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td>vec_splat_s16</html:td>

    
  <html:td>vsetq_lane_f32</html:td>

    
  <html:td>_mm_set1_pi16</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td>vec_splat_s32</html:td>

    
  <html:td>vld1_u8</html:td>

    
  <html:td>_mm_set_pi16</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td>vec_splat_s8</html:td>

    
  <html:td>vdupq_lane_s16</html:td>

    
  <html:td>_mm_load_ps</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td>vec_splat_u16</html:td>

    
  <html:td>vdupq_n_s16</html:td>

    
  <html:td>_mm_set1_ps</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td>vec_splat_u32</html:td>

    
  <html:td>vmovq_n_f32</html:td>

    
  <html:td>_mm_loadh_pi</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td>vec_splat_u8</html:td>

    
  <html:td>vset_lane_u8</html:td>

    
  <html:td>_mm_loadl_pi</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td>storing</html:td>

    
  <html:td>vec_st</html:td>

    
  <html:td>vst1_u8</html:td>

    
  <html:td />

  </html:tr>



  
  
  <html:tr>
    
  <html:td>vector</html:td>

    
  <html:td />

    
  <html:td>vst1q_s16</html:td>

    
  <html:td>_mm_store_ps</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td />

    
  <html:td>vst1q_f32</html:td>

    
  <html:td />

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td />

    
  <html:td>vst1_s16</html:td>

    
  <html:td />

  </html:tr>



  
  
  <html:tr>
    
  <html:td>add</html:td>

    
  <html:td>vec_madd</html:td>

    
  <html:td>vaddq_s16</html:td>

    
  <html:td>_mm_add_epi16</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td>vec_mladd</html:td>

    
  <html:td>vaddq_f32</html:td>

    
  <html:td>_mm_add_pi16</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td>vec_adds</html:td>

    
  <html:td>vmlaq_n_f32</html:td>

    
  <html:td>_mm_add_ps</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td>subtract</html:td>

    
  <html:td>vec_sub</html:td>

    
  <html:td>vsubq_s16</html:td>

    
  <html:td />

  </html:tr>



  
  
  <html:tr>
    
  <html:td>multiply</html:td>

    
  <html:td>vec_madd</html:td>

    
  <html:td>vmulq_n_s16</html:td>

    
  <html:td>_mm_mullo_epi16</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td>vec_mladd</html:td>

    
  <html:td>vmulq_s16</html:td>

    
  <html:td>_mm_mullo_pi16</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td />

    
  <html:td>vmulq_f32</html:td>

    
  <html:td>_mm_mul_ps</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td />

    
  <html:td>vmlaq_n_f32</html:td>

    
  <html:td />

  </html:tr>



  
  
  <html:tr>
    
  <html:td>arithmetic</html:td>

    
  <html:td>vec_sra</html:td>

    
  <html:td>vshrq_n_s16</html:td>

    
  <html:td>_mm_srai_epi16</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td>shift</html:td>

    
  <html:td>vec_srl</html:td>

    
  <html:td />

    
  <html:td>_mm_srai_pi16</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td>vec_sr</html:td>

    
  <html:td />

    
  <html:td />

  </html:tr>



  
  
  <html:tr>
    
  <html:td>byte</html:td>

    
  <html:td>vec_perm</html:td>

    
  <html:td>vtbl1_u8</html:td>

    
  <html:td>_mm_shuffle_pi16</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td>permutation</html:td>

    
  <html:td>vec_sel</html:td>

    
  <html:td>vtbx1_u8</html:td>

    
  <html:td>_mm_shuffle_ps</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td>vec_mergeh</html:td>

    
  <html:td>vget_high_s16</html:td>

    
  <html:td />

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td>vec_mergel</html:td>

    
  <html:td>vget_low_s16</html:td>

    
  <html:td />

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td />

    
  <html:td>vdupq_lane_s16</html:td>

    
  <html:td />

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td />

    
  <html:td>vdupq_n_s16</html:td>

    
  <html:td />

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td />

    
  <html:td>vmovq_n_f32</html:td>

    
  <html:td />

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td />

    
  <html:td>vbsl_u8</html:td>

    
  <html:td />

  </html:tr>



  
  
  <html:tr>
    
  <html:td>type</html:td>

    
  <html:td>vec_cts</html:td>

    
  <html:td>vmovl_u8</html:td>

    
  <html:td>_mm_packs_pu16</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td>conversion</html:td>

    
  <html:td>vec_unpackh</html:td>

    
  <html:td>vreinterpretq_s16_u16</html:td>

    
  <html:td />

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td>vec_unpackl</html:td>

    
  <html:td>vcvtq_u32_f32</html:td>

    
  <html:td />

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td>vec_cts</html:td>

    
  <html:td>vqmovn_s32</html:td>

    
  <html:td>_mm_cvtps_pi16</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td>vec_ctu</html:td>

    
  <html:td>vqmovun_s16</html:td>

    
  <html:td>_mm_packus_epi16</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td />

    
  <html:td>vqmovn_u16</html:td>

    
  <html:td />

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td />

    
  <html:td>vcvtq_f32_s32</html:td>

    
  <html:td />

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td />

    
  <html:td>vmovl_s16</html:td>

    
  <html:td />

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td />

    
  <html:td>vmovq_n_f32</html:td>

    
  <html:td />

  </html:tr>



  
  
  <html:tr>
    
  <html:td>vector</html:td>

    
  <html:td>vec_pack</html:td>

    
  <html:td>vcombine_u16</html:td>

    
  <html:td />

  </html:tr>



  
  
  <html:tr>
    
  <html:td>combination</html:td>

    
  <html:td>vec_packsu</html:td>

    
  <html:td>vcombine_u8</html:td>

    
  <html:td />

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td />

    
  <html:td>vcombine_s16</html:td>

    
  <html:td />

  </html:tr>



  
  
  <html:tr>
    
  <html:td>maximum</html:td>

    
  <html:td />

    
  <html:td />

    
  <html:td>_mm_max_ps</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td>minimum</html:td>

    
  <html:td />

    
  <html:td />

    
  <html:td>_mm_min_ps</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td>vector</html:td>

    
  <html:td />

    
  <html:td />

    
  <html:td>_mm_andnot_ps</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td>logic</html:td>

    
  <html:td />

    
  <html:td />

    
  <html:td>_mm_and_ps</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td />

    
  <html:td />

    
  <html:td />

    
  <html:td>_mm_or_ps</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td>rounding</html:td>

    
  <html:td>vec_trunc</html:td>

    
  <html:td />

    
  <html:td />

  </html:tr>



  
  
  <html:tr>
    
  <html:td>misc</html:td>

    
  <html:td />

    
  <html:td />

    
  <html:td>_mm_empty</html:td>

  </html:tr>



  
  
  <html:tr>
    
  <html:td>
  <html:hr />
</html:td>

    
  <html:td>
  <html:hr />
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  <html:td>
  <html:hr />
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  <html:td>
  <html:hr />
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  </html:tr>



</html:table>
</fr:mainmatter><fr:backmatter /></fr:tree><fr:p>Links
  <fr:ul><fr:li><fr:link
type="external"
href="https://www.youtube.com/watch?v=DXPfE2jGqg0">Utilizing the other 80% of your system's performance: Starting with Vectorization</fr:link></fr:li>
    <fr:li><fr:link
type="external"
href="https://stackoverflow.blog/2020/07/08/improving-performance-with-simd-intrinsics-in-three-use-cases/">Improving perf with simd intrinsics in three use cases</fr:link></fr:li>
    <fr:li><fr:link
type="external"
href="http://ftp.cvut.cz/kernel/people/geoff/cell/ps3-linux-docs/CellProgrammingTutorial/BasicsOfSIMDProgramming.html">Basics of SIMD programming</fr:link></fr:li>
    <fr:li><fr:link
type="external"
href="http://librestats.com/RparallelGuide/#the-simd-keyword">SIMD Keyword OpenMP, R, Parallelism</fr:link></fr:li>
    <fr:li><fr:link
type="external"
href="https://lowleveldev.substack.com/p/simd-a-practical-guide">SIMD a practical guide</fr:link></fr:li>
    <fr:li><fr:link
type="external"
href="https://stackoverflow.com/questions/70569824/organizing-multiple-implementations-for-simd">Organizing SIMD code - stackoverflow</fr:link></fr:li>
    <fr:li><fr:link
type="external"
href="https://stackoverflow.com/questions/661338/sse-sse2-and-sse3-for-gnu-c">SSE SSE2 and SSE3 for GNU C++ [closed] - stackoverflow</fr:link></fr:li>
    <fr:li><fr:link
type="external"
href="https://statmodeling.stat.columbia.edu/2023/11/01/simd-memory-locality-vectorization-and-branch-point-prediction/">SIMD, memory locality, vectorization, and branch point prediction</fr:link></fr:li>
    <fr:li><fr:link
type="external"
href="https://eclecticlight.co/2021/07/27/code-in-arm-assembly-rounding-and-arithmetic/">Code in ARM assembly: Rounding and arithmetic (scalar)</fr:link></fr:li>
    <fr:li><fr:link
type="external"
href="https://blog.yiningkarlli.com/2021/09/neon-vs-sse.html">Comparing SIMD on x86-64 and arm64</fr:link></fr:li></fr:ul></fr:p></fr:mainmatter><fr:backmatter /></fr:tree></fr:mainmatter><fr:backmatter /></fr:tree></fr:backmatter></fr:tree>